Operation:
Source(base 10) + Destination (base 10) -->; Destination
Compatibility: 68000 Family
Assembler Syntax:
ABCD Dy, Dx
ABCD -(Ay), -(Ax)
Attributes: Size = (Byte)
Description: Adds the source operand to the destination operand
along with the extend bit, and stores the result in the
destination location. The addition is performed using binary
coded decimal arithmetic. The operands, which are packed
BCD numbers, can be addressed in two different ways:
1. Data register to data register (Data Register Direct).
2. Memory to memory (Pre-decrement).
This operation is a byte operation only.
Condition Codes:
\c24242
X Set the same as the carry bit.
N Undefined.
Z Cleared if the result is nonzero. Unchanged otherwise.
V Undefined.
C Set if a decimal carry was generated. Cleared otherwise.
Note: Normally the Z condition code bit is set via programming before
the start of an operation. This allows successful tests for zero results
upon completion of multiple-precision operations.
Instruction Format:
\i1++--3Reg Rx,+----1RM,3Reg Ry,
Instruction Fields:
Register Rx field -- Specifies the destination register:
If RM = 0, specifies a data register
If RM = 1, specifies an address register for
predecrement mode
RM field -- Specifies the operand addressing mode:
0 -- the operation is data register to data register
1 -- the operation is memory to memory
Register Ry field -- Specifies the source register:
If RM = 0, specifies a data register
If RM = 1, specifies an address register for
predecrement mode