DBcc / DBRA

Operation:
If (condition false) then (Dn - 1 -->; Dn;
If Dn ≠ -1 then PC + d -->; PC)

Compatibility: 68000 Family

Assembler Syntax:
DBcc Dn, <label>
DBRA Dn, <label>

Attributes: Size = (Word)

Description: Control a loop of instructions. The parameters are:
a condition code, a data register (counter), and a displacement
value. The instruction first tests the condition (for ter-
mination); if it is true, no operation is performed. If the
termination condition is not true, the low-order 16 bits of
the counter data register are decremented by one. If the result
is -1, execution continues at the location indicated by the current
value of the PC plus the sign-extended 16-bit displacement. The
value in the PC is the address of the instruction word of the DBcc
instruction plus two. The displacement is a twos complement
integer that represents the relative distance in bytes from the
current PC to the destination PC.

CC carry clear 0100 /C
CS carry set 0101 C
EQ equal 0111 Z
F never equal 0001 0
GE greater or equal 1100 N • V + /N • /V
GT greater than 1110 N • V • /Z + /N • /V • /Z
HI high 0010 /C • /Z
LE less or equal 1111 Z + N • /V + /N • V
LS low or same 0011 C + Z
LT less than 1101 N • /V + /N • V
MI minus 1011 N
NE not equal 0110 /Z
PL plus 1010 /N
T always true 0000 1
VC overflow clear 1000 /V
VS overflow set 1001 V

Condition Codes:
Not affected.

Instruction Format:
\i2-+-+4Condition,++--+3Reg,016-bit Displacement,

Instruction Fields (Register Shifts):
Condition field -- The binary code for one of the
conditions listed in the table.
Register field -- Specifies the data register used as the
counter.
Displacement field -- Specifies the number of bytes to
branch.

Notes:
1. The terminating condition is similar to the UNTIL loop
clauses of high-level languages. For example: DBMI can
be stated as “decrement and branch until minus.”
2. The assembler accepts DBRA for DBF for use when only
a count terminates the loop (no condition is tested).
3. A program can enter a loop at the beginning or by branching
to the trailing DBcc instruction. Entering the loop at the
beginning is useful for indexed addressing modes and
dynamically specified bit operations. In this case, the
control index count must be one less than the desired
number of loop executions. However, when entering a
loop by branching directly to the trailing DBcc instruction,
the control count should equal the loop execution count. In
this case, if a zero count occurs, the DBcc instruction does
not branch, and the main loop is not executed.

Related Instructions:
Bcc,411
.437439