CAS2 Destination 1 -- Compare 1 -->; cc;
if Z, Destination 2 -- Compare 2 -->; cc
if Z, Update 1 -->; Destination 1; Update 2 -->; Destination 2
else Destination 1 -->; Compare 1; Destination 2 -->; Compare 2

Compatibility: MC68020/MC68030/MC68040

Assembler Syntax:
CAS2 Dc1:Dc2, Du1:Du2, (Rn1):(Rn2)

Attributes: Size = (Word, Long)

Description: CAS2 compares memory operand 1 (Rn1) to
compare operand 1 (Dc1). If the operands are equal, the
instruction compares memory operand 2 (Rn2) to compare
operand 2 (Dc2). If these operands are also equal, the inst-
ruction writes the update operands (Du1 and Du2) to the
memory operands (Rn1 and Rn2). If either comparison fails,
the instruction writes the memory operands (Rn1 and Rn2)
to the compare operands (Dc1 and Dc2). The instruction
accesses memory using locked or read-modify-write transfer
sequences. This provides a means of synchronizing several

Condition Codes:
X Not affected.
N Set if the result is negative. Cleared otherwise.
Z Set if the result is zero. Cleared otherwise.
V Set if an overflow is generated. Cleared otherwise.
C Set if a borrow is generated. Cleared otherwise.

Instruction Format:

Instruction Fields:
Size field -- Specifies the size of the operation.
10 -- Word operation.
11 -- Long operation.
DA1, DA2 fields -- Specify whether Rn1 and Rn2 reference data
or address registers, respectively.
0 -- The corresponding register is a data register.
1 -- The corresponding register is an address register.
Rn1, Rn2 fields -- Specify the numbers of the register that con-
tain the addresses of the first and second memory operands,
respectively. If the operands overlap in memory, the
results of any memory update are undefined.
Du1, Du2 fields -- Specify the data registers that contains the
update values to be written to the first and second memory
operand locations if the comparisons are successful.
Dc1, Dc2 field -- Specify the data registers that contain the test
values to be compared to the first and second memory
operands, respectively. If Dc1 and Dc2 specify the same
data register and the comparison fails, memory operand
1 is stored in the data register.

The CAS and CAS2 instructions can be used to perform secure
update operations on system control data structures in
a multiprocessing environment.

In the MC68040 if the operands are not equal, the destination 1
operand is written back to memory to complete the locked

Related Instructions: