Operation:
~(<number> of Destination) -->; Z;
0 -->; <bit number> of Destination
Compatibility: 68000 Family
Assembler Syntax:
BCLR Dn, <ea>
BCLR #<data>, <ea>
Attributes: Size = (Byte, Long)
Description: Tests a bit in the destination operand and sets
the Z condition code appropriately, then clears the specified
bit in the destination. When the destination is a data reg-
ister, any of the 32 bits can be specified by the modulo
32-bit number. When the destination is a memory
location, the operation is a byte operation, and the bit
number is modulo 8. In all cases, bit zero refers to the
least significant bit. The bit number for this operation
may be specified in either of two ways:
1. Immediate -- The bit number is specified in a
second word of the instruction.
2. Register -- The specified data register contains
the bit number.
Condition Codes:
\c33233
X Not affected.
N Not affected.
Z Set if the bit tested is zero. Cleared otherwise.
V Not affected.
C Not affected.
Instruction Format (Bit Number Dynamic,
specified in register):
\i1----3Reg,++-u6Effective Address,3Mode,3Reg,
Instruction Fields (Bit Number Dynamic):
Register field -- Specifies the data register that contains
the bit number.
Effective Address field -- Specifies the destination location.
Only data alterable addressing modes are allowed as
shown:
\mBF8
* Data register direct can be used for long only; all others
are byte only.
Instruction Format (Bit Number Static, specified
as immediate data):
\i2----+---+-u6Effective Address,3Mode,3Reg,--------8Bit Number,
Instruction Fields (Bit Number Static):
Effective Address field -- Specifies the destination location.
Only data alterable addressing modes are allowed as
shown:
\mBF8
* Data register direct can be used for long only; all others
are byte only.